Existing communication systems, such as those based on 3G, IEEE 802.16/WIMAX standards, may use turbo codes as error correction codes for encoding a data block to be transmitted. The data block can be encoded to obtain a Forward Error Correction (FEC) block. In a real scenario, the FEC block encoded using turbo codes can be transmitted from a transmitter to a receiver through a noisy channel. The FEC block enables the receiver to receive the data block with reduced errors despite the noisy channel. Accordingly, the receiver may employ a turbo decoder system for decoding the FEC block received from the transmitter.
Typically, a turbo decoder system consists of two elementary decoders that are serially concatenated. For example, the turbo decoder system may include two elementary decoders, referred to as decoder D1 and decoder D2. Output of the decoders D1 can be output L1 and output of the elementary decoder D2 can be output L2. The output L1 and the output L2 indicate soft information, such as a reliability of a bit being either 0 or 1, related to bits of the FEC block received from the transmitter. Output L1 and output L2 can be used to calculate the Log Likelihood Ratios (LLRs). The LLRs are related to the probability of a bit in the FEC block to be a 0 or 1.
When the FEC block is received by the receiver, the FEC block is decoded by the decoder D1 to produce output L1. Further, the output L1 is provided as an input to the decoder D2. Subsequently, the output L1 is decoded by the decoder D2 to produce output L2.
The decoding of the FEC block is performed iteratively for ensuring correct decoding of the bits in the FEC block. In general, accuracy of decoding the FEC block by the turbo encoder system is high, if number of iterations corresponding to the decoding of the FEC block is high. However, higher number of iterations for decoding the FEC block leads to an increase in power consumption and processing time of the turbo decoder system. Consequently, power consumption and throughput of the turbo decoder system may significantly be affected.
Several techniques have been proposed that terminate the iterative decoding process as soon as the FEC block is deemed to be successfully decoded. This reduces power consumption and improves the decoder processing throughput, for the case when the decoding of the FEC block may be eventually deemed successful. However, several FEC blocks may be significantly corrupted which may result in unsuccessful decoding even after a large number of iterations. This can lead to wasteful power consumption by the turbo decoder system. Hence there is a need to reduce the number of iterations of the iterative decoding process of the FEC block at the turbo decoder system in such situations.